threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
98 lines
2.3 KiB
C
98 lines
2.3 KiB
C
/*
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* Copyright (C) 2020 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __APUSYS_DAPC_CFG_H__
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#define __APUSYS_DAPC_CFG_H__
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#include <linux/types.h>
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struct dapc_driver;
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struct dapc_slave {
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int sys_idx;
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int ctrl_idx;
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int vio_idx;
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char *name;
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bool vio_irq_en;
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};
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struct dapc_exception {
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/* vio_dbg0 */
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uint32_t read_vio;
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uint32_t write_vio;
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uint32_t addr_high;
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uint32_t domain_id;
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/* vio_dbg1 */
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uint32_t trans_id;
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/* vio_dbg2 */
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uint32_t addr;
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};
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#define dapc_reg_base(d) ((unsigned long)d->reg)
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#define dapc_reg_w(d, r, val) \
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iowrite32(val, (void *) (dapc_reg_base(d) + (r)))
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#define dapc_reg_r(d, r) \
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ioread32((void *) (dapc_reg_base(d) + (r)))
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#define dapc_reg_clr(d, r, mask) \
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dapc_reg_w(d, r, dapc_reg_r(d, r) & ~(mask))
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#define dapc_reg_set(d, r, mask) \
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dapc_reg_w(d, r, dapc_reg_r(d, r) | (mask))
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#define DAPC_SLAVE_END {-1, -1, -1, NULL, false}
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struct dapc_config {
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int irq_enable; /* enable interrupt */
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struct dapc_slave *slv;
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int slv_cnt;
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uint32_t (*vio_mask)(uint32_t idx);
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uint32_t (*vio_sta)(uint32_t idx);
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int (*excp_info)(struct dapc_driver *d, struct dapc_exception *ex);
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uint32_t apc_con;
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uint32_t apc_con_vio;
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uint32_t vio_shift_sta;
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uint32_t vio_shift_sel;
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uint32_t vio_shift_con;
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uint32_t vio_shift_con_mask; /* shft_en | shft_done */
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uint32_t vio_dbg0;
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uint32_t vio_dbg1;
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uint32_t vio_dbg2;
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uint32_t slv_per_dapc;
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uint32_t vio_shift_max_bit;
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uint32_t vio_dbg_dmnid;
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uint32_t vio_dbg_dmnid_shift;
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uint32_t vio_dbg_w_vio;
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uint32_t vio_dbg_w_vio_shift;
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uint32_t vio_dbg_r_vio;
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uint32_t vio_dbg_r_vio_shift;
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uint32_t vio_dbg_addr;
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uint32_t vio_dbg_addr_shift;
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uint32_t ut_base;
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};
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extern struct dapc_config dapc_cfg_mt6885;
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extern struct dapc_config dapc_cfg_mt6873;
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extern struct dapc_config dapc_cfg_mt6853;
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extern struct dapc_config dapc_cfg_mt6893;
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extern struct dapc_config dapc_cfg_mt6877;
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#define for_each_dapc_slv(cfg, i) \
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for (i = 0; i < cfg->slv_cnt && cfg->slv[i].sys_idx >= 0; i++)
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#endif
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