threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
32 lines
815 B
C
32 lines
815 B
C
/*
|
|
* Copyright (c) 2015, NVIDIA Corporation.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef TEGRA_VIC_H
|
|
#define TEGRA_VIC_H
|
|
|
|
/* VIC methods */
|
|
|
|
#define VIC_SET_APPLICATION_ID 0x00000200
|
|
#define VIC_SET_FCE_UCODE_SIZE 0x0000071C
|
|
#define VIC_SET_FCE_UCODE_OFFSET 0x0000072C
|
|
|
|
/* VIC registers */
|
|
|
|
#define NV_PVIC_MISC_PRI_VIC_CG 0x000016d0
|
|
#define CG_IDLE_CG_DLY_CNT(val) ((val & 0x3f) << 0)
|
|
#define CG_IDLE_CG_EN (1 << 6)
|
|
#define CG_WAKEUP_DLY_CNT(val) ((val & 0xf) << 16)
|
|
|
|
/* Firmware offsets */
|
|
|
|
#define VIC_UCODE_FCE_HEADER_OFFSET (6*4)
|
|
#define VIC_UCODE_FCE_DATA_OFFSET (7*4)
|
|
#define FCE_UCODE_SIZE_OFFSET (2*4)
|
|
|
|
#endif /* TEGRA_VIC_H */
|