Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
177 lines
3.3 KiB
C
177 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include "helio-dvfsrc.h"
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#include "helio-dvfsrc-opp.h"
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static struct opp_profile opp_table[VCORE_DVFS_OPP_NUM];
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static int vcore_dvfs_to_vcore_opp[VCORE_DVFS_OPP_NUM];
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static int vcore_dvfs_to_ddr_opp[VCORE_DVFS_OPP_NUM];
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static int vcore_uv_table[VCORE_OPP_NUM];
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static int vcore_opp_to_pwrap_cmd[VCORE_OPP_NUM];
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static int ddr_table[DDR_OPP_NUM];
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/* ToDo: Copy Opp Table to AEE Dump */
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int get_cur_vcore_dvfs_opp(void)
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{
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#if defined(VCOREFS_LEVEL_POSITIVE)
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return __builtin_ffs(spm_get_dvfs_level());
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#else
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return VCORE_DVFS_OPP_NUM - __builtin_ffs(spm_get_dvfs_final_level());
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#endif
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}
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void set_opp_table(int vcore_dvfs_opp, int vcore_uv, int ddr_khz)
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{
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if (vcore_dvfs_opp >= VCORE_DVFS_OPP_NUM || vcore_dvfs_opp < 0)
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return;
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opp_table[vcore_dvfs_opp].vcore_uv = vcore_uv;
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opp_table[vcore_dvfs_opp].ddr_khz = ddr_khz;
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}
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void set_vcore_opp(int vcore_dvfs_opp, int vcore_opp)
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{
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if (vcore_dvfs_opp >= VCORE_DVFS_OPP_NUM || vcore_dvfs_opp < 0)
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return;
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vcore_dvfs_to_vcore_opp[vcore_dvfs_opp] = vcore_opp;
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}
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int get_vcore_opp(int opp)
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{
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if (opp >= VCORE_DVFS_OPP_NUM || opp < 0)
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return 0;
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return vcore_dvfs_to_vcore_opp[opp];
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}
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int get_vcore_uv(int opp)
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{
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if (opp >= VCORE_DVFS_OPP_NUM || opp < 0)
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return 0;
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return opp_table[opp].vcore_uv;
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}
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int get_cur_vcore_opp(void)
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{
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int idx;
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if (!is_qos_enabled())
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return VCORE_OPP_UNREQ;
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idx = get_cur_vcore_dvfs_opp();
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if (idx >= VCORE_DVFS_OPP_NUM)
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return VCORE_OPP_UNREQ;
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return vcore_dvfs_to_vcore_opp[idx];
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}
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int get_cur_vcore_uv(void)
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{
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int idx;
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if (!is_qos_enabled())
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return 0;
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idx = get_cur_vcore_dvfs_opp();
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if (idx >= VCORE_DVFS_OPP_NUM || idx < 0)
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return 0;
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return opp_table[idx].vcore_uv;
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}
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void set_ddr_opp(int vcore_dvfs_opp, int ddr_opp)
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{
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if (vcore_dvfs_opp >= VCORE_DVFS_OPP_NUM || vcore_dvfs_opp < 0)
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return;
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vcore_dvfs_to_ddr_opp[vcore_dvfs_opp] = ddr_opp;
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}
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int get_ddr_opp(int opp)
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{
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if (opp >= VCORE_DVFS_OPP_NUM || opp < 0)
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return 0;
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return vcore_dvfs_to_ddr_opp[opp];
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}
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int get_ddr_khz(int opp)
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{
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if (opp >= VCORE_DVFS_OPP_NUM || opp < 0)
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return 0;
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return opp_table[opp].ddr_khz;
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}
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int get_cur_ddr_opp(void)
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{
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int idx;
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if (!is_qos_enabled())
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return DDR_OPP_UNREQ;
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idx = get_cur_vcore_dvfs_opp();
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if (idx >= VCORE_DVFS_OPP_NUM || idx < 0)
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return DDR_OPP_UNREQ;
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return vcore_dvfs_to_ddr_opp[idx];
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}
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int get_cur_ddr_khz(void)
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{
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int idx;
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if (!is_qos_enabled())
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return 0;
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idx = get_cur_vcore_dvfs_opp();
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if (idx >= VCORE_DVFS_OPP_NUM || idx < 0)
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return 0;
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return opp_table[idx].ddr_khz;
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}
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void set_vcore_sram_uv_table(int vcore_sram_opp, int vcore_sram_uv)
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{
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spm_dvfs_pwrap_cmd(vcore_sram_opp, vcore_uv_to_pmic(vcore_sram_uv));
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}
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void set_vcore_uv_table(int vcore_opp, int vcore_uv)
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{
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spm_dvfs_pwrap_cmd(get_pwrap_cmd(vcore_opp),
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vcore_uv_to_pmic(vcore_uv));
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vcore_uv_table[vcore_opp] = vcore_uv;
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}
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int get_opp_ddr_freq(int ddr_opp)
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{
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return ddr_table[ddr_opp];
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}
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void set_opp_ddr_freq(int ddr_opp, int ddr_freq)
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{
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ddr_table[ddr_opp] = ddr_freq;
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}
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int get_vcore_uv_table(int vcore_opp)
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{
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return vcore_uv_table[vcore_opp];
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}
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void set_pwrap_cmd(int vcore_opp, int pwrap_cmd)
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{
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vcore_opp_to_pwrap_cmd[vcore_opp] = pwrap_cmd;
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}
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int get_pwrap_cmd(int vcore_opp)
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{
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return vcore_opp_to_pwrap_cmd[vcore_opp];
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}
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