threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
/*
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* Renesas Solutions Highlander R7780RP-1 Support.
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*
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* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/highlander.h>
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enum {
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UNUSED = 0,
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/* board specific interrupt sources */
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AX88796, /* Ethernet controller */
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PSW, /* Push Switch */
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CF, /* Compact Flash */
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PCI_A,
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PCI_B,
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PCI_C,
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PCI_D,
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */
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INTC_IRQ(PCI_B, 66),
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INTC_IRQ(PCI_C, 67),
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INTC_IRQ(PCI_D, 68),
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INTC_IRQ(CF, IRQ_CF),
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INTC_IRQ(PSW, IRQ_PSW),
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INTC_IRQ(AX88796, IRQ_AX88796),
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};
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static struct intc_mask_reg mask_registers[] __initdata = {
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{ 0xa5000000, 0, 16, /* IRLMSK */
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{ PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0,
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0, 0, 0, 0, 0, 0, PSW, AX88796 } },
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};
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static unsigned char irl2irq[HL_NR_IRL] __initdata = {
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65, 66, 67, 68,
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IRQ_CF, 0, 0, 0,
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0, 0, 0, 0,
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IRQ_AX88796, IRQ_PSW
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};
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static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
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NULL, mask_registers, NULL, NULL);
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unsigned char * __init highlander_plat_irq_setup(void)
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{
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if (__raw_readw(0xa5000600)) {
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printk(KERN_INFO "Using r7780rp interrupt controller.\n");
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register_intc_controller(&intc_desc);
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return irl2irq;
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}
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return NULL;
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}
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