threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
39 lines
1.2 KiB
C
39 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/****************************************************************************/
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/*
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* mcfslt.h -- ColdFire internal Slice (SLT) timer support defines.
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*
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* (C) Copyright 2004, Greg Ungerer (gerg@snapgear.com)
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* (C) Copyright 2009, Philippe De Muyter (phdm@macqel.be)
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*/
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/****************************************************************************/
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#ifndef mcfslt_h
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#define mcfslt_h
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/****************************************************************************/
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/*
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* Define the SLT timer register set addresses.
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*/
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#define MCFSLT_STCNT 0x00 /* Terminal count */
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#define MCFSLT_SCR 0x04 /* Control */
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#define MCFSLT_SCNT 0x08 /* Current count */
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#define MCFSLT_SSR 0x0C /* Status */
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/*
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* Bit definitions for the SCR control register.
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*/
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#define MCFSLT_SCR_RUN 0x04000000 /* Run mode (continuous) */
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#define MCFSLT_SCR_IEN 0x02000000 /* Interrupt enable */
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#define MCFSLT_SCR_TEN 0x01000000 /* Timer enable */
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/*
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* Bit definitions for the SSR status register.
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*/
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#define MCFSLT_SSR_BE 0x02000000 /* Bus error condition */
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#define MCFSLT_SSR_TE 0x01000000 /* Timeout condition */
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/****************************************************************************/
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#endif /* mcfslt_h */
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