threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
74 lines
3.2 KiB
C
74 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_M32R_CACHEFLUSH_H
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#define _ASM_M32R_CACHEFLUSH_H
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#include <linux/mm.h>
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extern void _flush_cache_all(void);
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extern void _flush_cache_copyback_all(void);
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#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#ifndef CONFIG_SMP
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#define flush_icache_range(start, end) _flush_cache_copyback_all()
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#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
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#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
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#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
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#else /* CONFIG_SMP */
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extern void smp_flush_cache_all(void);
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#define flush_icache_range(start, end) smp_flush_cache_all()
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#define flush_icache_page(vma,pg) smp_flush_cache_all()
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#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
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#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
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#endif /* CONFIG_SMP */
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#elif defined(CONFIG_CHIP_M32102)
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, end) _flush_cache_all()
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#define flush_icache_page(vma,pg) _flush_cache_all()
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#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
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#define flush_cache_sigtramp(addr) _flush_cache_all()
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#else
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, end) do { } while (0)
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define flush_cache_sigtramp(addr) do { } while (0)
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#endif /* CONFIG_CHIP_* */
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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memcpy(dst, src, len); \
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flush_icache_user_range(vma, page, vaddr, len); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#endif /* _ASM_M32R_CACHEFLUSH_H */
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