threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
43 lines
1.8 KiB
C
43 lines
1.8 KiB
C
/* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers
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*
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* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_MB86943A_H
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#define _ASM_MB86943A_H
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#include <asm/mb-regs.h>
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#define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
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#define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001
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#define MB86943_SL_CTL_AS_HOST 0x00000002
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#define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004
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#define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008
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#define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010
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#define MB86943_SL_CTL_ECS0_ENABLE 0x00000020
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#define MB86943_SL_CTL_ECS1_ENABLE 0x00000040
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#define MB86943_SL_CTL_ECS2_ENABLE 0x00000080
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#define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
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#define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
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#define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
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#define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
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#define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
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#define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
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#define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
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#define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
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#define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
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#define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014)
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#define MB86943_PCIARB_EN 0x00000001
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#endif /* _ASM_MB86943A_H */
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