threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
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* arch/arm/mach-w90x900/include/mach/regs-timer.h
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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* All rights reserved.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef __ASM_ARCH_REGS_TIMER_H
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#define __ASM_ARCH_REGS_TIMER_H
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/* Timer Registers */
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#define TMR_BA W90X900_VA_TIMER
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#define REG_TCSR0 (TMR_BA+0x00)
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#define REG_TCSR1 (TMR_BA+0x04)
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#define REG_TICR0 (TMR_BA+0x08)
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#define REG_TICR1 (TMR_BA+0x0C)
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#define REG_TDR0 (TMR_BA+0x10)
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#define REG_TDR1 (TMR_BA+0x14)
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#define REG_TISR (TMR_BA+0x18)
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#define REG_WTCR (TMR_BA+0x1C)
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#define REG_TCSR2 (TMR_BA+0x20)
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#define REG_TCSR3 (TMR_BA+0x24)
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#define REG_TICR2 (TMR_BA+0x28)
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#define REG_TICR3 (TMR_BA+0x2C)
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#define REG_TDR2 (TMR_BA+0x30)
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#define REG_TDR3 (TMR_BA+0x34)
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#define REG_TCSR4 (TMR_BA+0x40)
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#define REG_TICR4 (TMR_BA+0x48)
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#define REG_TDR4 (TMR_BA+0x50)
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#endif /* __ASM_ARCH_REGS_TIMER_H */
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