threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
105 lines
3.3 KiB
C
105 lines
3.3 KiB
C
/*
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* Copyright (c) 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - GPIO lib support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* some boards require extra gpio capacity to support external
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* devices that need GPIO.
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*/
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#ifndef GPIO_SAMSUNG_S3C24XX_H
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#define GPIO_SAMSUNG_S3C24XX_H
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/*
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* GPIO sizes for various SoCs:
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*
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* 2410 2412 2440 2443 2416
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* 2442
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* ---- ---- ---- ---- ----
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* A 23 22 25 16 27
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* B 11 11 11 11 11
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* C 16 16 16 16 16
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* D 16 16 16 16 16
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* E 16 16 16 16 16
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* F 8 8 8 8 8
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* G 16 16 16 16 8
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* H 11 11 11 15 15
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* J -- -- 13 16 --
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* K -- -- -- -- 16
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* L -- -- -- 15 14
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* M -- -- -- 2 2
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*/
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/* GPIO bank sizes */
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#define S3C2410_GPIO_A_NR (32)
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#define S3C2410_GPIO_B_NR (32)
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#define S3C2410_GPIO_C_NR (32)
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#define S3C2410_GPIO_D_NR (32)
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#define S3C2410_GPIO_E_NR (32)
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#define S3C2410_GPIO_F_NR (32)
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#define S3C2410_GPIO_G_NR (32)
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#define S3C2410_GPIO_H_NR (32)
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#define S3C2410_GPIO_J_NR (32) /* technically 16. */
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#define S3C2410_GPIO_K_NR (32) /* technically 16. */
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#define S3C2410_GPIO_L_NR (32) /* technically 15. */
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#define S3C2410_GPIO_M_NR (32) /* technically 2. */
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#if CONFIG_S3C_GPIO_SPACE != 0
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#error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
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#endif
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#define S3C2410_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
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#ifndef __ASSEMBLY__
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enum s3c_gpio_number {
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S3C2410_GPIO_A_START = 0,
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S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
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S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
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S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
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S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
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S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
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S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
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S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
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S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
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S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
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S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
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S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
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};
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#endif /* __ASSEMBLY__ */
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/* S3C2410 GPIO number definitions. */
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#define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
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#define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
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#define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
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#define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
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#define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
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#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
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#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
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#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
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#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
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#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
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#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
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#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
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#ifdef CONFIG_CPU_S3C244X
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#define S3C_GPIO_END (S3C2410_GPJ(0) + 32)
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#elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
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#define S3C_GPIO_END (S3C2410_GPM(0) + 32)
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#else
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#define S3C_GPIO_END (S3C2410_GPH(0) + 32)
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#endif
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#endif /* GPIO_SAMSUNG_S3C24XX_H */
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