threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
60 lines
1.5 KiB
C
60 lines
1.5 KiB
C
/*
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* arch/arm/mach-lpc32xx/include/mach/uncompress.h
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*
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* Author: Kevin Wells <kevin.wells@nxp.com>
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*
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* Copyright (C) 2010 NXP Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARM_ARCH_UNCOMPRESS_H
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#define __ASM_ARM_ARCH_UNCOMPRESS_H
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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/*
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* Uncompress output is hardcoded to standard UART 5
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*/
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#define UART_FIFO_CTL_TX_RESET (1 << 2)
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#define UART_STATUS_TX_MT (1 << 6)
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#define _UARTREG(x) (void __iomem *)(LPC32XX_UART5_BASE + (x))
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#define LPC32XX_UART_DLLFIFO_O 0x00
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#define LPC32XX_UART_IIRFCR_O 0x08
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#define LPC32XX_UART_LSR_O 0x14
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static inline void putc(int ch)
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{
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/* Wait for transmit FIFO to empty */
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while ((__raw_readl(_UARTREG(LPC32XX_UART_LSR_O)) &
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UART_STATUS_TX_MT) == 0)
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;
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__raw_writel((u32) ch, _UARTREG(LPC32XX_UART_DLLFIFO_O));
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}
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static inline void flush(void)
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{
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__raw_writel(__raw_readl(_UARTREG(LPC32XX_UART_IIRFCR_O)) |
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UART_FIFO_CTL_TX_RESET, _UARTREG(LPC32XX_UART_IIRFCR_O));
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}
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/* NULL functions; we don't presently need them */
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#define arch_decomp_setup()
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#endif
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