threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
198 lines
5.7 KiB
Devicetree
198 lines
5.7 KiB
Devicetree
/*
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* Copyright (c) 2017 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/ {
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mt6360_pmu: mt6360_pmu_dts {
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status = "ok"
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mt6360,intr_gpio_num = <3>; /* direct defined GPIO num */
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mt6360,intr_gpio = <&pio 3 0x0>; /* GPIO */
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interrupt-controller;
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#interrupt-cells = <2>;
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adc: adc {
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compatible = "mediatek,mt6360_pmu_adc";
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <41 0>, <43 0>, <44 0>;
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interrupt-names = "bat_ovp_adc_evt",
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"adc_wakeup_evt",
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"adc_donei";
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#io-channel-cells = <1>;
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};
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chg {
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compatible = "mediatek,mt6360_pmu_chg";
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <4 0>, <6 0>, <7 0>, <9 0>,
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<12 0>, <13 0>, <14 0>, <15 0>,
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<27 0>, <29 0>, <30 0>, <32 0>,
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<35 0>, <40 0>, <48 0>, <60 0>;
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interrupt-names = "chg_treg_evt", "chg_mivr_evt",
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"pwr_rdy_evt", "chg_batsysuv_evt",
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"chg_vsysuv_evt", "chg_vsysov_evt",
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"chg_vbatov_evt", "chg_vbusov_evt",
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"chg_tmri", "chg_adpbadi",
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"chg_rvpi", "chg_aiccmeasl",
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"wdtmri", "pumpx_donei",
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"attachi", "chrdet_ext_evt";
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io-channels = <&adc 0>, <&adc 1>, <&adc 3>, <&adc 4>,
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<&adc 5>, <&adc 6>, <&adc 8>, <&adc 10>;
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io-channel-names = "USBID", "VBUSDIV5", "VSYS", "VBAT",
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"IBUS", "IBAT", "TEMP_JC", "TS";
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chg_name = "primary_chg";
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ichg = <2000000>; /* uA */
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aicr = <500000>; /* uA */
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mivr = <4400000>; /* uV */
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cv = <4350000>; /* uA */
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ieoc = <150000>; /* uA */
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safety_timer = <12>; /* hour */
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ircmp_resistor = <25000>; /* uohm */
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ircmp_vclamp = <32000>; /* uV */
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en_te = <1>;
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en_wdt = <1>;
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aicc_once = <1>;
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post_aicc = <1>;
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};
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fled {
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compatible = "mediatek,mt6360_pmu_fled";
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <11 0>, <74 0>, <75 0>, <78 0>,
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<79 0>;
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interrupt-names = "fled_chg_vinovp_evt", "fled_tx_evt",
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"fled_lvf_evt", "fled2_short_evt",
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"fled1_short_evt";
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/* 0: fixed mode, 1: tracking mode */
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fled_vmid_track = <0>;
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/* 64~2432ms, 32ms/step */
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fled_strb_tout = <1248>;
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/* 25000~400000uA, 12500uA/step */
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fled1_tor_cur = <37500>;
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/*
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* 25000~750000uA, 6250uA/step
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* 750000~1500000uA, 12500uA/step
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*/
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/*fled1_strb_cur = <800000>; */
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fled1_strb_cur = <750000>;
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/* 25000~400000uA, 12500uA/step */
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fled2_tor_cur = <37500>;
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/*
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* 25000~750000uA, 6250uA/step
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* 750000~1500000uA, 12500uA/step
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*/
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fled2_strb_cur = <800000>;
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};
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rgbled {
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compatible = "mediatek,mt6360_pmu_rgbled";
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mt,led_name = "mt6360_pmu_led1", "mt6360_pmu_led2",
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"mt6360_pmu_led3", "mt6360_pmu_led4";
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mt,led_default_trigger = "cc_mode", "cc_mode",
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"cc_mode", "none";
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};
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core {
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compatible = "mediatek,mt6360_pmu_core";
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <65 0>, <66 0>, <67 0>,
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<68 0>, <69 0>, <70 0>,
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<71 0>;
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interrupt-names = "ap_wdtrst_evt",
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"en_evt",
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"qonb_rst_evt",
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"mrstb_evt",
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"otp_evt",
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"vddaov_evt",
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"sysuv_evt";
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mren = <1>;
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apwdtrst_en = <1>;
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cc_open_sel = <3>;
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i2c_cc_open_tsel = <1>;
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ldo5_otp_en = <0>;
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};
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};
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mt6360_pmic: mt6360_pmic_dts {
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status = "ok"
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <96 0>, <100 0>, <101 0>, <102 0>,
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<104 0>, <108 0>, <109 0>, <110 0>,
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<118 0>, <119 0>, <126 0>, <127 0>;
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interrupt-names = "buck1_pgb_evt", "buck1_oc_evt",
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"buck1_ov_evt", "buck1_uv_evt",
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"buck2_pgb_evt", "buck2_oc_evt",
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"buck2_ov_evt", "buck2_uv_evt",
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"ldo6_oc_evt", "ldo7_oc_evt",
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"ldo6_pgb_evt", "ldo7_pgb_evt";
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pwr_off_seq = [06 04 00 02];
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buck1 {
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regulator-compatible = "BUCK1";
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regulator-name = "VMDLA";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-always-on;
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};
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buck2 {
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regulator-compatible = "BUCK2";
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regulator-name = "VDRAM1";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1300000>;
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regulator-always-on;
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};
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ldo6 {
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regulator-compatible = "LDO6";
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regulator-name = "VMDDR";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-always-on;
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};
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ldo7 {
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regulator-compatible = "LDO7";
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regulator-name = "VDRAM2";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <2100000>;
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regulator-always-on;
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};
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};
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mt6360_ldo: mt6360_ldo_dts {
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status = "ok"
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interrupt-parent = <&mt6360_pmu>;
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interrupts = <113 0>, <114 0>, <115 0>, <117 0>,
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<121 0>, <122 0>, <123 0>, <125 0>;
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interrupt-names = "ldo1_oc_evt", "ldo2_oc_evt",
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"ldo3_oc_evt", "ldo5_oc_evt",
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"ldo1_pgb_evt", "ldo2_pgb_evt",
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"ldo3_pgb_evt", "ldo5_pgb_evt";
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mt_pmic_vfp_ldo_reg: ldo1 {
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regulator-compatible = "LDO1";
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regulator-name = "VFP";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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};
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mt_pmic_vtp_ldo_reg: ldo2 {
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regulator-compatible = "LDO2";
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regulator-name = "VTP";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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};
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mt_pmic_vmc_ldo_reg: ldo3 {
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regulator-compatible = "LDO3";
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regulator-name = "VMC";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3600000>;
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};
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mt_pmic_vmch_ldo_reg: ldo5 {
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regulator-compatible = "LDO5";
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regulator-name = "VMCH";
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3600000>;
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};
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};
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};
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