threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
288 lines
7.3 KiB
Devicetree
288 lines
7.3 KiB
Devicetree
/*
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* Copyright (c) 2019 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* CAMERA GPIO standardization */
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&pio {
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camera0_mclk_2mA: camera0_mclk_2mA@gpio100 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO100__FUNC_CMMCLK1>;
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drive-strength = <MTK_DRIVE_2mA>;
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};
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};
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camera0_mclk_4mA: camera0_mclk_4mA@gpio100 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO100__FUNC_CMMCLK1>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera0_mclk_6mA: camera0_mclk_6mA@gpio100 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO100__FUNC_CMMCLK1>;
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drive-strength = <MTK_DRIVE_6mA>;
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};
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};
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camera0_mclk_8mA: camera0_mclk_8mA@gpio100 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO100__FUNC_CMMCLK1>;
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drive-strength = <7>;
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};
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};
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camera0_mclk_off: camera0_mclk_gpio_mode@gpio100 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera1_mclk_2mA: camera1_mclk_2mA@gpio99 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO99__FUNC_CMMCLK0>;
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drive-strength = <MTK_DRIVE_2mA>;
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};
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};
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camera1_mclk_4mA: camera1_mclk_4mA@gpio99 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO99__FUNC_CMMCLK0>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera1_mclk_6mA: camera1_mclk_6mA@gpio99 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO99__FUNC_CMMCLK0>;
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drive-strength = <MTK_DRIVE_6mA>;
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};
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};
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camera1_mclk_8mA: camera1_mclk_8mA@gpio99 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO99__FUNC_CMMCLK0>;
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drive-strength = <7>;
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};
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};
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camera1_mclk_off: camera1_mclk_gpio_mode@gpio99 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO99__FUNC_GPIO99>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera2_mclk_2mA: camera2_mclk_2mA@gpio111 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO111__FUNC_CMMCLK3>;
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drive-strength = <MTK_DRIVE_2mA>;
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};
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};
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camera2_mclk_4mA: camera2_mclk_4mA@gpio111 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO111__FUNC_CMMCLK3>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera2_mclk_6mA: camera2_mclk_6mA@gpio111 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO111__FUNC_CMMCLK3>;
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drive-strength = <MTK_DRIVE_6mA>;
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};
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};
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camera2_mclk_8mA: camera2_mclk_8mA@gpio111 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO111__FUNC_CMMCLK3>;
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drive-strength = <7>;
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};
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};
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camera2_mclk_off: camera2_mclk_gpio_mode@gpio111 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO111__FUNC_GPIO111>;
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drive-strength = <MTK_DRIVE_4mA>;
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};
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};
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camera0_rst_low: camera0_rst_output_low@gpio102 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO102__FUNC_GPIO102>;
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output-low;
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};
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};
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camera0_rst_high: camera0_rst_output_high@gpio102 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO102__FUNC_GPIO102>;
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output-high;
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};
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};
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camera0_pdn_low: camera0_pdn_output_low@gpio98 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO98__FUNC_GPIO98>;
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output-low;
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};
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};
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camera0_pdn_high: camera0_pdn_output_high@gpio98 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO98__FUNC_GPIO98>;
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output-high;
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};
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};
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camera1_rst_low: camera1_rst_output_low@gpio101 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO101__FUNC_GPIO101>;
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output-low;
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};
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};
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camera1_rst_high: camera1_rst_output_high@gpio101 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO101__FUNC_GPIO101>;
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output-high;
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};
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};
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camera1_pdn_low: camera1_pdn_output_low@gpio97 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO97__FUNC_GPIO97>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera1_pdn_high: camera1_pdn_output_high@gpio97 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO97__FUNC_GPIO97>;
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output-high;
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};
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};
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camera2_rst_low: camera2_rst_output_low@gpio109 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO109__FUNC_GPIO109>;
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output-low;
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};
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};
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camera2_rst_high: camera2_rst_output_high@gpio109 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO109__FUNC_GPIO109>;
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output-high;
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};
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};
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camera2_pdn_low: camera2_pdn_output_low@gpio110 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO110__FUNC_GPIO110>;
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output-low;
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};
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};
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camera2_pdn_high: camera2_pdn_output_high@gpio110 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO110__FUNC_GPIO110>;
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output-high;
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};
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};
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camera0_vcamd_off: camera0_vcamd_output_low@gpio178 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
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output-low;
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};
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};
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camera0_vcamd_on: camera0_vcamd_output_high@gpio178 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
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output-high;
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};
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};
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camera1_vcamd_off: camera1_vcamd_output_low@gpio179 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO179__FUNC_GPIO179>;
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output-low;
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};
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};
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camera1_vcamd_on: camera1_vcamd_output_high@gpio179 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO179__FUNC_GPIO179>;
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output-high;
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};
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};
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camera2_vcama_off: camera2_vcama_output_low@gpio107 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO107__FUNC_GPIO107>;
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output-low;
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};
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};
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camera2_vcama_on: camera2_vcama_output_high@gpio107 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO107__FUNC_GPIO107>;
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output-high;
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};
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};
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camera_pins_default: camdefault {
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};
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};
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&kd_camera_hw1 {
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pinctrl-names = "default",
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"cam0_rst0", "cam0_rst1",
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"cam0_pnd0", "cam0_pnd1",
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"cam1_rst0", "cam1_rst1",
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"cam1_pnd0", "cam1_pnd1",
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"cam2_rst0", "cam2_rst1",
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"cam2_pnd0", "cam2_pnd1",
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"cam0_vcamd_on",
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"cam0_vcamd_off",
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"cam1_vcamd_on",
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"cam1_vcamd_off",
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"cam2_vcama_on",
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"cam2_vcama_off",
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"cam0_mclk_off",
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"cam0_mclk_2mA", "cam0_mclk_4mA",
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"cam0_mclk_6mA", "cam0_mclk_8mA",
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"cam1_mclk_off",
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"cam1_mclk_2mA", "cam1_mclk_4mA",
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"cam1_mclk_6mA", "cam1_mclk_8mA",
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"cam2_mclk_off",
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"cam2_mclk_2mA", "cam2_mclk_4mA",
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"cam2_mclk_6mA", "cam2_mclk_8mA";
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pinctrl-0 = <&camera_pins_default>;
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pinctrl-1 = <&camera0_rst_low>;
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pinctrl-2 = <&camera0_rst_high>;
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pinctrl-3 = <&camera0_pdn_low>;
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pinctrl-4 = <&camera0_pdn_high>;
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pinctrl-5 = <&camera1_rst_low>;
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pinctrl-6 = <&camera1_rst_high>;
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pinctrl-7 = <&camera1_pdn_low>;
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pinctrl-8 = <&camera1_pdn_high>;
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pinctrl-9 = <&camera2_rst_low>;
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pinctrl-10 = <&camera2_rst_high>;
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pinctrl-11 = <&camera2_pdn_low>;
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pinctrl-12 = <&camera2_pdn_high>;
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pinctrl-13 = <&camera0_vcamd_on>;
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pinctrl-14 = <&camera0_vcamd_off>;
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pinctrl-15 = <&camera1_vcamd_on>;
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pinctrl-16 = <&camera1_vcamd_off>;
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pinctrl-17 = <&camera2_vcama_on>;
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pinctrl-18 = <&camera2_vcama_off>;
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pinctrl-19 = <&camera0_mclk_off>;
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pinctrl-20 = <&camera0_mclk_2mA>;
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pinctrl-21 = <&camera0_mclk_4mA>;
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pinctrl-22 = <&camera0_mclk_6mA>;
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pinctrl-23 = <&camera0_mclk_8mA>;
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pinctrl-24 = <&camera1_mclk_off>;
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pinctrl-25 = <&camera1_mclk_2mA>;
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pinctrl-26 = <&camera1_mclk_4mA>;
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pinctrl-27 = <&camera1_mclk_6mA>;
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pinctrl-28 = <&camera1_mclk_8mA>;
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pinctrl-29 = <&camera2_mclk_off>;
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pinctrl-30 = <&camera2_mclk_2mA>;
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pinctrl-31 = <&camera2_mclk_4mA>;
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pinctrl-32 = <&camera2_mclk_6mA>;
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pinctrl-33 = <&camera2_mclk_8mA>;
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cam0_vcama-supply = <&mt_pmic_vcama1_ldo_reg>;
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cam1_vcama-supply = <&mt_pmic_vcama2_ldo_reg>;
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cam2_vcamd-supply = <&mt_pmic_vcamd_ldo_reg>;
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cam0_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
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cam1_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
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cam2_vcamio-supply = <&mt_pmic_vcamio_ldo_reg>;
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status = "okay";
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};
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/* CAMERA GPIO end */
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