threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
118 lines
2.9 KiB
Plaintext
118 lines
2.9 KiB
Plaintext
UniPhier reset controller
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System reset
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------------
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Required properties:
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- compatible: should be one of the following:
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"socionext,uniphier-ld4-reset" - for LD4 SoC
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"socionext,uniphier-pro4-reset" - for Pro4 SoC
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"socionext,uniphier-sld8-reset" - for sLD8 SoC
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"socionext,uniphier-pro5-reset" - for Pro5 SoC
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"socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC
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"socionext,uniphier-ld11-reset" - for LD11 SoC
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"socionext,uniphier-ld20-reset" - for LD20 SoC
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- #reset-cells: should be 1.
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Example:
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sysctrl@61840000 {
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compatible = "socionext,uniphier-ld11-sysctrl",
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"simple-mfd", "syscon";
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reg = <0x61840000 0x4000>;
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reset {
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compatible = "socionext,uniphier-ld11-reset";
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#reset-cells = <1>;
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};
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other nodes ...
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};
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Media I/O (MIO) reset, SD reset
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-------------------------------
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Required properties:
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- compatible: should be one of the following:
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"socionext,uniphier-ld4-mio-reset" - for LD4 SoC
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"socionext,uniphier-pro4-mio-reset" - for Pro4 SoC
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"socionext,uniphier-sld8-mio-reset" - for sLD8 SoC
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"socionext,uniphier-pro5-sd-reset" - for Pro5 SoC
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"socionext,uniphier-pxs2-sd-reset" - for PXs2/LD6b SoC
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"socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO)
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"socionext,uniphier-ld11-sd-reset" - for LD11 SoC (SD)
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"socionext,uniphier-ld20-sd-reset" - for LD20 SoC
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- #reset-cells: should be 1.
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Example:
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mioctrl@59810000 {
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compatible = "socionext,uniphier-ld11-mioctrl",
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"simple-mfd", "syscon";
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reg = <0x59810000 0x800>;
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reset {
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compatible = "socionext,uniphier-ld11-mio-reset";
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#reset-cells = <1>;
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};
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other nodes ...
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};
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Peripheral reset
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----------------
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Required properties:
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- compatible: should be one of the following:
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"socionext,uniphier-ld4-peri-reset" - for LD4 SoC
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"socionext,uniphier-pro4-peri-reset" - for Pro4 SoC
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"socionext,uniphier-sld8-peri-reset" - for sLD8 SoC
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"socionext,uniphier-pro5-peri-reset" - for Pro5 SoC
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"socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC
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"socionext,uniphier-ld11-peri-reset" - for LD11 SoC
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"socionext,uniphier-ld20-peri-reset" - for LD20 SoC
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- #reset-cells: should be 1.
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Example:
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perictrl@59820000 {
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compatible = "socionext,uniphier-ld11-perictrl",
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"simple-mfd", "syscon";
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reg = <0x59820000 0x200>;
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reset {
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compatible = "socionext,uniphier-ld11-peri-reset";
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#reset-cells = <1>;
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};
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other nodes ...
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};
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Analog signal amplifier reset
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-----------------------------
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Required properties:
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- compatible: should be one of the following:
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"socionext,uniphier-ld11-adamv-reset" - for LD11 SoC
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"socionext,uniphier-ld20-adamv-reset" - for LD20 SoC
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- #reset-cells: should be 1.
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Example:
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adamv@57920000 {
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compatible = "socionext,uniphier-ld11-adamv",
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"simple-mfd", "syscon";
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reg = <0x57920000 0x1000>;
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adamv_rst: reset {
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compatible = "socionext,uniphier-ld11-adamv-reset";
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#reset-cells = <1>;
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};
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other nodes ...
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};
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