threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
39 lines
1.3 KiB
Plaintext
39 lines
1.3 KiB
Plaintext
DT bindings for the Renesas R-Car and RZ/G Reset Controllers
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The R-Car and RZ/G Reset Controllers provide reset control, and implement the
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following functions:
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- Latching of the levels on mode pins when PRESET# is negated,
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- Mode monitoring register,
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- Reset control of peripheral devices (on R-Car Gen1),
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- Watchdog timer (on R-Car Gen1),
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- Register-based reset control and boot address registers for the various CPU
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cores (on R-Car Gen2 and Gen3, and on RZ/G).
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Required properties:
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- compatible: Should be
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- "renesas,<soctype>-reset-wdt" for R-Car Gen1,
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- "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
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Examples with soctypes are:
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- "renesas,r8a7743-rst" (RZ/G1M)
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- "renesas,r8a7745-rst" (RZ/G1E)
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- "renesas,r8a7778-reset-wdt" (R-Car M1A)
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- "renesas,r8a7779-reset-wdt" (R-Car H1)
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- "renesas,r8a7790-rst" (R-Car H2)
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- "renesas,r8a7791-rst" (R-Car M2-W)
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- "renesas,r8a7792-rst" (R-Car V2H
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- "renesas,r8a7793-rst" (R-Car M2-N)
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- "renesas,r8a7794-rst" (R-Car E2)
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- "renesas,r8a7795-rst" (R-Car H3)
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- "renesas,r8a7796-rst" (R-Car M3-W)
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- "renesas,r8a77995-rst" (R-Car D3)
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- reg: Address start and address range for the device.
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Example:
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rst: reset-controller@e6160000 {
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compatible = "renesas,r8a7795-rst";
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reg = <0 0xe6160000 0 0x0200>;
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};
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