threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
59 lines
2.1 KiB
Plaintext
59 lines
2.1 KiB
Plaintext
* Renesas R-Car generation 2 USB PHY
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This file provides information on what the device node for the R-Car generation
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2 USB PHY contains.
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Required properties:
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- compatible: "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
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"renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
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"renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
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"renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 compatible device.
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When compatible with the generic version, nodes must list the
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SoC-specific version corresponding to the platform first
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followed by the generic version.
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- reg: offset and length of the register block.
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- #address-cells: number of address cells for the USB channel subnodes, must
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be <1>.
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- #size-cells: number of size cells for the USB channel subnodes, must be <0>.
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- clocks: clock phandle and specifier pair.
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- clock-names: string, clock input name, must be "usbhs".
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The USB PHY device tree node should have the subnodes corresponding to the USB
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channels. These subnodes must contain the following properties:
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- reg: the USB controller selector; see the table below for the values.
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- #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
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The phandle's argument in the PHY specifier is the USB controller selector for
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the USB channel; see the selector meanings below:
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+-----------+---------------+---------------+
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|\ Selector | | |
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+ --------- + 0 | 1 |
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| Channel \| | |
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+-----------+---------------+---------------+
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| 0 | PCI EHCI/OHCI | HS-USB |
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| 2 | PCI EHCI/OHCI | xHCI |
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+-----------+---------------+---------------+
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Example (Lager board):
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usb-phy@e6590100 {
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compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
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reg = <0 0xe6590100 0 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
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clock-names = "usbhs";
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usb-channel@0 {
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reg = <0>;
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#phy-cells = <1>;
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};
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usb-channel@2 {
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reg = <2>;
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#phy-cells = <1>;
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};
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};
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