threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
32 lines
1.1 KiB
Plaintext
32 lines
1.1 KiB
Plaintext
* Mediatek Video Processor Unit
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Video Processor Unit is a HW video controller. It controls HW Codec including
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H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
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Required properties:
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- compatible: "mediatek,mt8173-vpu"
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- reg: Must contain an entry for each entry in reg-names.
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- reg-names: Must include the following entries:
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"tcm": tcm base
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"cfg_reg": Main configuration registers base
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- interrupts: interrupt number to the cpu.
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- clocks : clock name from clock manager
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- clock-names: must be main. It is the main clock of VPU
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Optional properties:
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- memory-region: phandle to a node describing memory (see
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
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to be used for VPU extended memory; if not present, VPU may be located
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anywhere in the memory
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Example:
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vpu: vpu@10020000 {
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compatible = "mediatek,mt8173-vpu";
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reg = <0 0x10020000 0 0x30000>,
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<0 0x10050000 0 0x100>;
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reg-names = "tcm", "cfg_reg";
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&topckgen TOP_SCP_SEL>;
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clock-names = "main";
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};
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