threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
44 lines
1.4 KiB
Plaintext
44 lines
1.4 KiB
Plaintext
ARM MHU Mailbox Driver
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======================
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The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has
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3 independent channels/links to communicate with remote processor(s).
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MHU links are hardwired on a platform. A link raises interrupt for any
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received data. However, there is no specified way of knowing if the sent
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data has been read by the remote. This driver assumes the sender polls
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STAT register and the remote clears it after having read the data.
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The last channel is specified to be a 'Secure' resource, hence can't be
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used by Linux running NS.
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Mailbox Device Node:
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====================
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Required properties:
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--------------------
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- compatible: Shall be "arm,mhu" & "arm,primecell"
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- reg: Contains the mailbox register address range (base
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address and length)
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- #mbox-cells Shall be 1 - the index of the channel needed.
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- interrupts: Contains the interrupt information corresponding to
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each of the 3 links of MHU.
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Example:
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--------
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mhu: mailbox@2b1f0000 {
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#mbox-cells = <1>;
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compatible = "arm,mhu", "arm,primecell";
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reg = <0 0x2b1f0000 0x1000>;
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interrupts = <0 36 4>, /* LP-NonSecure */
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<0 35 4>, /* HP-NonSecure */
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<0 37 4>; /* Secure */
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clocks = <&clock 0 2 1>;
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clock-names = "apb_pclk";
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};
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mhu_client: scb@2e000000 {
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compatible = "fujitsu,mb86s70-scb-1.0";
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reg = <0 0x2e000000 0x4000>;
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mboxes = <&mhu 1>; /* HP-NonSecure */
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};
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