Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
61 lines
1.9 KiB
Plaintext
61 lines
1.9 KiB
Plaintext
Allwinner Clock Control Unit Binding
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Required properties :
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- compatible: must contain one of the following compatibles:
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- "allwinner,sun4i-a10-ccu"
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- "allwinner,sun5i-a10s-ccu"
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- "allwinner,sun5i-a13-ccu"
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- "allwinner,sun6i-a31-ccu"
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- "allwinner,sun7i-a20-ccu"
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- "allwinner,sun8i-a23-ccu"
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- "allwinner,sun8i-a33-ccu"
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- "allwinner,sun8i-a83t-ccu"
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- "allwinner,sun8i-a83t-r-ccu"
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- "allwinner,sun8i-h3-ccu"
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- "allwinner,sun8i-h3-r-ccu"
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+ - "allwinner,sun8i-r40-ccu"
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- "allwinner,sun8i-v3s-ccu"
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- "allwinner,sun9i-a80-ccu"
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- "allwinner,sun50i-a64-ccu"
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- "allwinner,sun50i-a64-r-ccu"
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- "allwinner,sun50i-h5-ccu"
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- "allwinner,sun50i-h6-ccu"
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- "nextthing,gr8-ccu"
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- reg: Must contain the registers base address and length
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- clocks: phandle to the oscillators feeding the CCU. Two are needed:
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- "hosc": the high frequency oscillator (usually at 24MHz)
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- "losc": the low frequency oscillator (usually at 32kHz)
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On the A83T, this is the internal 16MHz oscillator divided by 512
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- clock-names: Must contain the clock names described just above
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- #clock-cells : must contain 1
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- #reset-cells : must contain 1
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For the main CCU on H6, one more clock is needed:
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- "iosc": the SoC's internal frequency oscillator
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For the PRCM CCUs on A83T/H3/A64, two more clocks are needed:
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- "pll-periph": the SoC's peripheral PLL from the main CCU
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- "iosc": the SoC's internal frequency oscillator
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Example for generic CCU:
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ccu: clock@01c20000 {
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compatible = "allwinner,sun8i-h3-ccu";
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reg = <0x01c20000 0x400>;
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clocks = <&osc24M>, <&osc32k>;
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clock-names = "hosc", "losc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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Example for PRCM CCU:
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r_ccu: clock@01f01400 {
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compatible = "allwinner,sun50i-a64-r-ccu";
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reg = <0x01f01400 0x100>;
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clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;
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clock-names = "hosc", "losc", "iosc", "pll-periph";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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