threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
24 lines
722 B
Plaintext
24 lines
722 B
Plaintext
* Core Divider Clock bindings for Marvell MVEBU SoCs
|
|
|
|
The following is a list of provided IDs and clock names on Armada 370/XP:
|
|
0 = nand (NAND clock)
|
|
|
|
Required properties:
|
|
- compatible : must be "marvell,armada-370-corediv-clock",
|
|
"marvell,armada-375-corediv-clock",
|
|
"marvell,armada-380-corediv-clock",
|
|
"marvell,mv98dx3236-corediv-clock",
|
|
|
|
- reg : must be the register address of Core Divider control register
|
|
- #clock-cells : from common clock binding; shall be set to 1
|
|
- clocks : must be set to the parent's phandle
|
|
|
|
Example:
|
|
|
|
corediv_clk: corediv-clocks@18740 {
|
|
compatible = "marvell,armada-370-corediv-clock";
|
|
reg = <0x18740 0xc>;
|
|
#clock-cells = <1>;
|
|
clocks = <&pll>;
|
|
};
|