threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
31 lines
867 B
Plaintext
31 lines
867 B
Plaintext
* Clock bindings for Freescale i.MX6 Quad
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Required properties:
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- compatible: Should be "fsl,imx6q-ccm"
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- reg: Address and length of the register set
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- interrupts: Should contain CCM interrupt
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6qdl-clock.h
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for the full list of i.MX6 Quad and DualLite clock IDs.
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Examples:
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#include <dt-bindings/clock/imx6qdl-clock.h>
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clks: ccm@020c4000 {
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compatible = "fsl,imx6q-ccm";
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reg = <0x020c4000 0x4000>;
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interrupts = <0 87 0x04 0 88 0x04>;
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#clock-cells = <1>;
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};
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uart1: serial@02020000 {
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compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
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reg = <0x02020000 0x4000>;
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interrupts = <0 26 0x04>;
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clocks = <&clks IMX6QDL_CLK_UART_IPG>, <&clks IMX6QDL_CLK_UART_SERIAL>;
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clock-names = "ipg", "per";
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};
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