threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
* Faraday Technology FTIDE010 PATA controller
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This controller is the first Faraday IDE interface block, used in the
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StorLink SL2312 and SL3516, later known as the Cortina Systems Gemini
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platform. The controller can do PIO modes 0 through 4, Multi-word DMA
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(MWDM)modes 0 through 2 and Ultra DMA modes 0 through 6.
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On the Gemini platform, this PATA block is accompanied by a PATA to
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SATA bridge in order to support SATA. This is why a phandle to that
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controller is compulsory on that platform.
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The timing properties are unique per-SoC, not per-board.
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Required properties:
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- compatible: should be one of
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"cortina,gemini-pata", "faraday,ftide010"
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"faraday,ftide010"
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- interrupts: interrupt for the block
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- reg: registers and size for the block
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Optional properties:
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- clocks: a SoC clock running the peripheral.
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- clock-names: should be set to "PCLK" for the peripheral clock.
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Required properties for "cortina,gemini-pata" compatible:
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- sata: a phande to the Gemini PATA to SATA bridge, see
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cortina,gemini-sata-bridge.txt for details.
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Example:
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ata@63000000 {
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compatible = "cortina,gemini-pata", "faraday,ftide010";
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reg = <0x63000000 0x100>;
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interrupts = <4 IRQ_TYPE_EDGE_RISING>;
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clocks = <&gcc GEMINI_CLK_GATE_IDE>;
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clock-names = "PCLK";
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sata = <&sata>;
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};
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