/* * Copyright (C) 2017 MediaTek Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. * See http://www.gnu.org/licenses/gpl-2.0.html for more details. */ struct cpu_efficiency { const char *compatible; unsigned long efficiency; }; /* * Table of relative efficiency of each processors * The efficiency value must fit in 20bit and the final * cpu_scale value must be in the range * 0 < cpu_scale < SCHED_CAPACITY_SCALE. * Processors that are not defined in the table, * use the default SCHED_CAPACITY_SCALE value for cpu_scale. */ static const struct cpu_efficiency table_efficiency[] = { { "arm,cortex-a75", 3630 }, { "arm,cortex-a73", 3630 }, { "arm,cortex-a72", 4186 }, { "arm,cortex-a57", 3891 }, { "arm,cortex-a53", 2048 }, { "arm,cortex-a55", 2048 }, { "arm,cortex-a35", 1661 }, { NULL, }, }; static unsigned long __cpu_capacity[NR_CPUS]; #define cpu_capacity(cpu) __cpu_capacity[cpu] static unsigned long max_cpu_perf, min_cpu_perf; void __init parse_dt_cpu_capacity(void) { const struct cpu_efficiency *cpu_eff; struct device_node *cn = NULL; int cpu = 0, i = 0; min_cpu_perf = ULONG_MAX; max_cpu_perf = 0; for_each_possible_cpu(cpu) { const u32 *rate; int len; unsigned long cpu_perf; /* too early to use cpu->of_node */ cn = of_get_cpu_node(cpu, NULL); if (!cn) { pr_debug("missing device node for CPU %d\n", cpu); continue; } for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) if (of_device_is_compatible(cn, cpu_eff->compatible)) break; if (cpu_eff->compatible == NULL) continue; rate = of_get_property(cn, "clock-frequency", &len); if (!rate || len != 4) { pr_debug("%s missing clock-frequency property\n", cn->full_name); continue; } cpu_perf = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; cpu_capacity(cpu) = cpu_perf; max_cpu_perf = max(max_cpu_perf, cpu_perf); min_cpu_perf = min(min_cpu_perf, cpu_perf); i++; } if (i < num_possible_cpus()) { max_cpu_perf = 0; min_cpu_perf = 0; } } /* * generic entry point for cpu mask construction, dedicated for * mediatek scheduler. */ void __init arch_build_cpu_topology_domain(void) { parse_dt_cpu_capacity(); } #ifdef CONFIG_MTK_UNIFY_POWER #include "../../../drivers/misc/mediatek/base/power/include/mtk_upower.h" /* sd energy functions */ inline const struct sched_group_energy * const cpu_cluster_energy(int cpu) { struct sched_group_energy *sge = sge_array[cpu][SD_LEVEL1]; int cluster_id = cpu_topology[cpu].cluster_id; struct upower_tbl_info **addr_ptr_tbl_info; struct upower_tbl_info *ptr_tbl_info; struct upower_tbl *ptr_tbl; if (!sge) { pr_warn("Invalid sched_group_energy for Cluster%d\n", cpu); return NULL; } addr_ptr_tbl_info = upower_get_tbl(); ptr_tbl_info = *addr_ptr_tbl_info; ptr_tbl = ptr_tbl_info[UPOWER_BANK_CLS_BASE+cluster_id].p_upower_tbl; sge->nr_cap_states = ptr_tbl->row_num; sge->cap_states = ptr_tbl->row; sge->lkg_idx = ptr_tbl->lkg_idx; return sge; } inline const struct sched_group_energy * const cpu_core_energy(int cpu) { struct sched_group_energy *sge = sge_array[cpu][SD_LEVEL0]; struct upower_tbl *ptr_tbl; if (!sge) { pr_warn("Invalid sched_group_energy for CPU%d\n", cpu); return NULL; } ptr_tbl = upower_get_core_tbl(cpu); sge->nr_cap_states = ptr_tbl->row_num; sge->cap_states = ptr_tbl->row; sge->lkg_idx = ptr_tbl->lkg_idx; return sge; } #endif /* * Scheduler load-tracking scale-invariance * * Provides the scheduler with a scale-invariance correction factor that * compensates for frequency scaling. */ static DEFINE_PER_CPU(atomic_long_t, cpu_freq_capacity); static DEFINE_PER_CPU(atomic_long_t, cpu_max_freq); static DEFINE_PER_CPU(atomic_long_t, cpu_min_freq); /* cpufreq callback function setting current cpu frequency */ void arch_scale_set_curr_freq(int cpu, unsigned long freq) { unsigned long max = atomic_long_read(&per_cpu(cpu_max_freq, cpu)); unsigned long curr; if (!max) return; curr = (freq * SCHED_CAPACITY_SCALE) / max; atomic_long_set(&per_cpu(cpu_freq_capacity, cpu), curr); } /* cpufreq callback function setting max cpu frequency */ void arch_scale_set_max_freq(int cpu, unsigned long freq) { atomic_long_set(&per_cpu(cpu_max_freq, cpu), freq); } void arch_scale_set_min_freq(int cpu, unsigned long freq) { atomic_long_set(&per_cpu(cpu_min_freq, cpu), freq); } unsigned long arch_scale_get_max_freq(int cpu) { unsigned long max = atomic_long_read(&per_cpu(cpu_max_freq, cpu)); return max; } unsigned long arch_scale_get_min_freq(int cpu) { unsigned long min = atomic_long_read(&per_cpu(cpu_min_freq, cpu)); return min; } unsigned long arch_get_max_cpu_capacity(int cpu) { return per_cpu(cpu_scale, cpu); } unsigned long arch_get_cur_cpu_capacity(int cpu) { unsigned long scale_freq; scale_freq = arch_scale_freq_capacity(NULL, cpu); if (!scale_freq) scale_freq = SCHED_CAPACITY_SCALE; return (per_cpu(cpu_scale, cpu) * scale_freq / SCHED_CAPACITY_SCALE); } int arch_is_smp(void) { return (max_cpu_perf == min_cpu_perf) ? 1 : 0; } int arch_get_nr_clusters(void) { int __arch_nr_clusters = -1; int max_id = 0; unsigned int cpu; /* assume socket id is monotonic increasing without gap. */ for_each_possible_cpu(cpu) { struct cpu_topology *cpu_topo = &cpu_topology[cpu]; if (cpu_topo->cluster_id > max_id) max_id = cpu_topo->cluster_id; } __arch_nr_clusters = max_id + 1; return __arch_nr_clusters; } int arch_is_multi_cluster(void) { return (arch_get_nr_clusters() > 1); } int arch_get_cluster_id(unsigned int cpu) { struct cpu_topology *cpu_topo = &cpu_topology[cpu]; return cpu_topo->cluster_id < 0 ? 0 : cpu_topo->cluster_id; } void arch_get_cluster_cpus(struct cpumask *cpus, int cluster_id) { unsigned int cpu; cpumask_clear(cpus); for_each_possible_cpu(cpu) { struct cpu_topology *cpu_topo = &cpu_topology[cpu]; if (cpu_topo->cluster_id == cluster_id) cpumask_set_cpu(cpu, cpus); } }